Online Encyclopedia
List of Intel microprocessors
Here is a list of Intel microprocessors:
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4004
- Introduced November 15, 1971
- Clock speed 740 kHz
- 0.06 MIPS
- Bus Width 4 bits (multiplexed address/data due to limited pins)
- PMOS
- Number of Transistors 2,300 at 10 μm
- Addressable Memory 640 bytes
- Program Memory 4K bytes
- World's first microprocessor
- Used in Busicom calculator
- Trivia: The original goal was to equal the clock speed of the IBM 1620; this was not quite met.
-
4040
- Introduced TBD, 1974
- Clock speed of 500 kHz to 740 kHz using 4 to 5.185 MHz crystals
- 0.06 MIPS
- Bus Width 4 bits (multiplexed address/data due to limited pins)
- PMOS
- Number of Transistors 3,000 at 10 μm
- Addressable Memory 640 bytes
- Program Memory 8K bytes
- Interrupts
- Enhanced version of 4004
-
8008
- Introduced April 1, 1972
- Clock speed 500 kHz (8008-1: 800 kHz)
- 0.05 MIPS
- Bus Width 8 bits (multiplexed address/data due to limited pins)
- PMOS
- Number of Transistors 3,500 at 10 μm
- Addressable memory 16 kilobytes
- Typical in dumb terminals, general calculators, bottling machines
- Developed in tandem with 4004
- Originally intended for use in the Datapoint 2200
-
8080
- Introduced April 1, 1974
- Clock speed 2MHz
- 0.64 MIPS
- Bus Width 8 bits data, 16 bits address
- NMOS
- Number of Transistors 6,000 at 6 μm
- Addressable memory 64 kilobytes
- 10X the performance of the 8008
- Used in the Altair 8800, Traffic light controller, cruise missile
- Required six support chips versus 20 for the 8008
-
8085
- Introduced March 1976
- Clock speed 5MHz
- 0.37 MIPS
- Bus Width 8 bits data, 16 bits address
- Number of Transistors 6,500 at 3 μm
- Used in Toledo scale
- High level of integration, operating for the first time on a single 5 volt power supply, from 12 volts previously
-
8086
- Introduced June 8, 1978
- Clock speeds:
- 5MHz with 0.33 MIPS
- 8MHz with 0.66MIPS
- 10MHz with 0.75 MIPS
- Bus Width 16 bits data, 20 bits address
- Number of Transistors 29,000 at 3 μm
- Addressable memory 1 megabyte
- 10X the performance of 8080
- Used in portable computing
- Instruction set backwards compatible to 8080
- Used segment registers to access more than 64K of data at once, bane of programmers' existence for years to come
-
8088
- Introduced June 1, 1979
- Clock speeds:
- 5MHz with 0.33 MIPS
- 8MHz with 0.75 MIPS
- Internal architecture 16 bits
- External bus Width 8 bits data, 20 bits address
- Number of Transistors 29,000 at 3 μm
- Addressable memory 1 megabyte
- Identical to 8086 except for its 8 bit external bus
- Used in IBM PCs and PC clones
-
iAPX 432
- Introduced 1981 as Intel's first 32-bit microprocessor
- Object/capability architecture
- Microcoded operating system primitives
- One terabyte virtual address space
- Hardware support for fault tolerance
- Two-chip General Data Processor (GDP), consists of 43201 and 43202
- 43203 Interface Processor (IP) interfaces to I/O subsystem
- 43204 Bus Interface Unit (BIU) simplifies building multiprocessor systems
- 43205 Memory Control Unit (MCU)
- Architecture and execution unit internal data paths 32 bit
- Clock speeds:
- 5 MHz
- 7 MHz
- 8 MHz
-
80186
- Introduced 1982
- Used mostly in embedded applications - controllers, point-of-sale systems, terminals, and the like
- Included two timers, a DMA controller, and an interrupt controller on the chip in addition to the processor
- Later renamed the iAPX 186
-
80188
- Same as 80186 except with 8 bit external data bus
-
80286
- Introduced February 1, 1982
- Clock speeds:
- 6MHz with 0.9 MIPS
- 8MHz, 10MHz with 1.5 MIPS
- 12.5MHz with 2.66 MIPS
- Bus Width 16 bits
- Included memory protection hardware to support multitasking operating systems with per-process address space
- Number of Transistors 134,000 at 1.5 μm
- Addressable memory 16 megabytes
- Added protected-mode features to 8086 with essentially the same instruction set
- 3-6X the performance of the 8086
- Widely used in PC clones at the time
- Can scan the Encyclopędia Britannica in 45 seconds
-
80386DX
- Introduced October 17, 1985
- Clock speeds:
- 16MHz with 5 to 6 MIPS
- 2/16/1987 20MHz with 6 to 7 MIPS
- 4/4/1988 25MHz with 8.5 MIPS
- 4/10/1989 33MHz with 11.4 MIPS (9.4 SPECint92 on Compaq/i 16K L2)
- Bus Width 32 bits
- Number of Transistors 275,000 at 1 μm
- Addressable memory 4 gigabytes
- Virtual memory 64 terabytes
- First x86 chip to handle 32-bit data sets
- Reworked and expanded memory protection support including paged virtual memory and virtual-86 mode, features required by Windows 95 and OS/2 Warp
- Used in Desktop computing
- Can address enough memory to manage an eight-page history of every person on earth
- Can scan the Encyclopędia Britannica in 12.5 seconds
- 80386SX
- Introduced June 16, 1988
- Clock speeds:
- 16MHz with 2.5 MIPS
- 1/25/1989 20MHz with 2.5 MIPS, 25MHz with 2.7 MIPS
- 10/26/1992 33MHz with 2.9 MIPS
- Internal architecture 32 bits
- External bus width 16 bits
- Number of Transitors 275,000 at 1 μm
- Addressable memory 16 megabytes
- Virtual memory 256 gigabytes
- 16-bit address bus enable low cost 32-bit processing
- Built in multitasking
- Used in entry-level desktop and portable computing
- 80376
- Variant of 386 intended for embedded systems
- No "real mode", starts up directly in "protected mode"
- 80960 (i960)
-
80486DX
- Introduced April 10, 1989
- Clock speeds:
- 25MHz with 20 MIPS (16.8 SPECint92, 7.40 SPECfp92)
- 5/7/1990 33MHz with 27 MIPS (22.4 SPECint92 on Micronics M4P 128k L2)
- 6/24/1991 50MHz with 41 MIPS (33.4 SPECint92, 14.5 SPECfp92 on Compaq/50L 256K L2)
- Bus Width 32 bits
- Number of Transistors 1.2 million at 1 μm; the 50MHz was at 0.8 μm
- Addressable memory 4 gigabytes
- Virtual memory 64 terabytes
- Level 1 cache on chip
- 50X performance of the 8088
- Used in Desktop computing and servers
-
80860 (i860)
- Introduced 1989
- Intel's first superscalar processor
- RISC architecture, with pipeline characteristics very visible to programmer
- 80386SL
- Introduced October 15, 1990
- Clock speeds:
- 20MHz with 4.21 MIPS
- 9/30/1991 25MHz with 5.3 MIPS
- Internal architecture 32 bits
- External bus width 16 bits
- Number of Transistors 855,000 at 1 μm
- Addressable memory 4 gigabytes
- Virtual memory 64 terabytes
- First chip specifically made for portable computers because of low power consumption of chip
- Highly integrated, includes cache, bus, and memory controllers
-
80486SX
- Introduced April 22, 1991
- Clock speeds:
- 9/16/1991 16MHz with 13 MIPS, 20MHz with 16.5 MIPS
- 9/16/1991 25MHz with 20 MIPS (12 SPECint92)
- 9/21/1992 33MHz with 27 MIPS (15.86 SPECint92)
- Bus Width 32 bits
- Number of Transistors 1.185 million at 1 μm and 900,000 at 0.8 μm
- Addressable memory 4 gigabytes
- Virtual memory 64 terabytes
- Identical in design to 486DX but without math coprocessor
- Used in low-cost entry to 486 CPU desktop computing
- Upgradable with the Intel OverDrive processor
-
80486DX2
- Introduced March 3. 1992
- Clock speeds:
- 50MHz with 41 MIPS (29.9 SPECint92, 14.2 SPECfp92 on Micronics M4P 256K L2)
- 8/10/1992 66 MHz with 54 MIPS (39.6 SPECint92, 18.8 SPECfp92 on Micronics M4P 256K L2)
- Bus Width 32 bits
- Number of Transistors 1.2 million at 0.8 μm
- Addressable memory 4 gigabytes
- Virtual memory 64 terabytes
- Used in high performance, low cost desktops
- Uses "speed doubler" technology where the microprocessor core runs at twice the speed of the bus
-
80486SL
- Introduced November 9, 1992
- Clock speeds:
- 20MHz with 15.4MIPS
- 25MHz with 19 MIPS
- 33MHz with 25 MIPS
- Bus Width 32 bits
- Number of Transistors 1.4 million at 0.8 μm
- Addressable memory 64 megabytes
- Virtual memory 64 terabytes
- Used in notebook PCS
-
Pentium
- Introduced March 22, 1993
- Clock speeds:
- 60MHz with 100 MIPS (70.4 SPECint92, 55.1 SPECfp92 on Xpress 256K L2)
- 66 MHz with 112 MIPS (77.9 SPECint92, 63.6 SPECfp92 on Xpress 256K L2)
- 75 MHz Introduced October 10, 1994
- 90 MHz Introduced March 7, 1994
- 100 MHz Introduced March 7, 1994
- 120 MHz Introduced March 27, 1995
- 133 MHz Introduced June, 1995
- 150 MHz Introduced January 4, 1996
- 166 MHz Introduced January 4, 1996
- 200 MHz Introduced June 10, 1996
- Bus width 64 bits
- Address bus 32 bits
- Number of transistors 3.1 million at 0.8 μm
- Addressable Memory 4 gigabytes
- Virtual Memory 64 terabytes
- Pin count 273 PGA Package
- Package dimensions 2.16" x 2.16"
- Superscalar architecture brought 5X the performance of the 33MHz 486DX processor
- Ran on 5volts of power
- Used in desktops
-
80486DX4
- Introduced March 7, 1994
- Clock speeds:
- 75MHz with 53 MIPS (41.3 SPECint92, 20.1 SPECfp92 on Micronics M4P 256K L2)
- 100MHz with 70.7 MIPS (54.59 SPECint92, 26.91 SPECfp92 on Micronics M4P 256K L2)
- Number of Transistors 1.6 million at 0.6 μm
- Bus width 32 bits
- Addressable memory 4 gigabytes
- Virtual memory 64 terabytes
- Pin count 168 PGA Package, 208 SQFP Package
- Die size 345 Square mm
- Used in high performance entry-level desktops and value notebooks
-
Pentium Pro (200, 180, 166, 150 MHz)
- Variants
- 150 MHz Introduced November 1, 1995
- 166 MHz Introduced November 1, 1995
- 180 MHz Introduced November 1, 1995
- 200 MHz Introduced November 1, 1995
- 200 MHz (1MB L2 Cache) Introduced August 18, 1997
- Variants
-
Pentium MMX
- Variants
- 166 MHz Introduced January 8, 1997
- 200 MHz Introduced January 8, 1997
- 233 MHz Introduced June 2, 1997
- 166 MHz (Mobile) Introduced January 12, 1998
- 200 MHz (Mobile) Introduced September 8, 1997
- 233 MHz (Mobile) Introduced September 8, 1997
- 266 MHz (Mobile) Introduced January 12, 1998
- 300 MHz (Mobile) Introduced January 7, 1999
- Variants
-
Pentium II
- Variants
- 233 MHz Introduced May 7, 1997
- 266 MHz Introduced May 7, 1997
- 300 MHz Introduced May 7, 1997
- 333 MHz Introduced January 26, 1998
- 350 MHz Introduced April 15, 1998
- 400 MHz Introduced April 15, 1998
- 450 MHz Introduced August 24, 1998
- 233 MHz (Mobile) Introduced April 2, 1998
- 266 MHz (Mobile) Introduced April 2, 1998
- 300 MHz (Mobile) Introduced September 9, 1998
- 333 MHz (Mobile)
- 366 MHz (Mobile)
- Variants
-
Celeron
- Variants
- 266 MHz Introduced April 15, 1998
- 300 MHz Introduced June 9, 1998
- 300A MHz Introduced August 24, 1998
- 333 MHz Introduced August 24, 1998
- 366 MHz Introduced January 4, 1999
- 400 MHz Introduced January 4, 1999
- 433 MHz Introduced March 22, 1999
- 466 MHz
- 500 MHz Introduced August 2, 1999
- 533 MHz Introduced January 4, 2000
- 566 MHz
- 633 MHz Introduced June 26, 2000
- 667 MHz Introduced June 26, 2000
- 700 MHz Introduced June 26, 2000
- 733 MHz Introduced November 13, 2000
- 766 MHz Introduced November 13, 2000
- 800 MHz
- 850 MHz Introducted April 9, 2001
- 900 MHz Introducted July 2, 2001
- 950 MHz Introduced August 31, 2001
- 1000 MHz Introduced August 31, 2001
- 1100 MHz Introduced August 31, 2001
- 1200 MHz Introduced October 2, 2001
- 1300 MHz Introduced January 3, 2002
- 266 MHz (Mobile)
- 300 MHz (Mobile)
- 333 MHz (Mobile) Introduced April 5, 1999
- 366 MHz (Mobile)
- 400 MHz (Mobile)
- 433 MHz (Mobile)
- 450 MHz (Mobile) Introduced February 14, 2000
- 466 MHz (Mobile)
- 500 MHz (Mobile) Introduced February 14, 2000
- 550 MHz (Mobile)
- 600 MHz (Mobile) Introduced June 19, 2000
- 650 MHz (Mobile) Introduced June 19, 2000
- 700 MHz (Mobile) Introduced September 25, 2000
- 750 MHz (Mobile) Introducted March 19, 2001
- 800 MHz (Mobile)
- 850 MHz (Mobile) Introduced July 2, 2001
- 600 MHz (LV Mobile)
- 500 MHz (ULV Mobile) Introducted January 30, 2001
- 600 MHz (ULV Mobile)
- Later Celerons are based on the Pentium 4's NetBurst microarchitecture.
- Variants
- Pentium II Xeon (400 MHz)
-
Pentium III
- Introduced February 26, 1999
- Streaming SIMD Extensions
- All Mobile Pentium III processors introduced in 2000 and later include SpeedStep Technology, allowing them to reduce processor speed to increase battery life.
- Variants
- 450 MHz Introduced February 26, 1999
- 500 MHz Introduced February 26, 1999
- 533 MHz Introduced September 27, 1999
- 550 MHz Introduced May 17, 1999
- 600 MHz Introduced August 2, 1999
- 650 MHz Introduced October 25, 1999
- 667 MHz Introduced October 25, 1999
- 700 MHz Introduced October 25, 1999
- 733 MHz Introduced October 25, 1999
- 750 MHz Introduced December 20, 1999
- 800 MHz Introduced December 20, 1999
- 850 MHz Introduced March 20, 2000
- 866 MHz Introduced March 20, 2000
- 933 MHz Introduced May 24, 2000
- 1000 MHz Introduced March 8, 2000 (Not widely available at time of release)
- 1133 MHz (Tualatin: 512k cache, 0.13 μm process)
- 1333 MHz (Tualatin: 512k cache, 0.13 μm process)
- 1400 MHz (Tualatin: 512k cache, 0.13 μm process)
- 400 MHz (Mobile) Introduced October 25, 1999
- 450 MHz (Mobile) Introduced October 25, 1999
- 500 MHz (Mobile) Introduced October 25, 1999
- 600 MHz (Mobile) Introduced January 18, 2000
- 650 MHz (Mobile) Introduced January 18, 2000
- 700 MHz (Mobile) Introduced April 24, 2000
- 750 MHz (Mobile) Introduced June 19, 2000
- 800 MHz (Mobile) Introduced September 25, 2000
- 850 MHz (Mobile) Introduced September 25, 2000
- 900 MHz (Mobile) Introducted March 19, 2001
- 1000 MHz (Mobile) Introducted March 19, 2001
- 866 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced July 30, 2001
- 933 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced July 30, 2001
- 1000 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced July 30, 2001
- 1200 MHz (Mobile Tualatin: 512k cache, 0.13 μm process) Introduced October 1, 2001
- 600 MHz (LV Mobile) Introduced June 19, 2000
- 700 MHz (LV Mobile) Introduced February 27, 2001
- 750 MHz (LV Mobile) Introduced May 21,2001
- 500 MHz (ULV Mobile) Introducted January 30, 2001
- 600 MHz (ULV Mobile) Introduced May 21, 2001
- 700 MHz (ULV Mobile)
- Pentium(r) III Xeon(tm) Processor
- Introduced October 25, 1999
- Number of transistors: 9.5 million at 0.25 μm or 28 million at 0.18 μm)
- L2 cache is 256KB, 1MB, or 2MB Advanced Transfer Cache (Integrated)
- Processor Package Sytle is Single Edge Contact Cartridge (S.E.C.C.2) or SC330
- System Bus Speed 133 MHz (256KB L2 cache) or 100 MHz (1-2MB L2 cache)
- System Bus Width 64 bit
- Addressable memory 64 gigabytes
- Used in two-way servers and workstations (256KB L2) or 4- and 8-way servers (1-2MB L2)
- Variants
- 500 MHz (0.25 μm process) Introduced March 17, 1999
- 550 MHz (0.25 μm process) Introduced August 23, 1999
- 600 MHz (0.18 μm process, 256KB L2 cache) Introduced October 25, 1999
- 667 MHz (0.18 μm process, 256KB L2 cache) Introduced October 25, 1999
- 733 MHz (0.18 μm process, 256KB L2 cache) Introduced October 25, 1999
- 800 MHz (0.18 μm process, 256KB L2 cache) Introduced January 12, 2000
- 866 MHz (0.18 μm process, 256KB L2 cache) Introduced April 10, 2000
- 933 MHz (0.18 μm process, 256KB L2 cache)
- 1000 MHz (0.18 μm process, 256KB L2 cache) Introduced August 22, 2000
- 700 MHz (0.18 μm process, 1-2MB L2 cache) Introduced May 22, 2000
- 900 MHz (0.18 μm process, 2MB L2 cache) Introduced March 21, 2001
- Pentium(r) 4 Processor built on 0.18 μm process technology (1.40 and 1.50 GHz)
- Introduced November 20, 2000
- L2 cache was 256KB Advanced Tansfer Cache (Integrated)
- Processor Package Style was PGA423, PGA478
- System Bus Speed 400 MHz
- SSE2 SIMD Extensions
- Number of Transistors 42 million
- Used in desktops and entry-level workstations
- Pentium(r) 4 Processor built on 0.18 μm process technology (1.7 GHz)
- Intel(r) Xeon(tm) Processor (1.4, 1.5, 1.7 GHz)
- Pentium(r) 4 Processor built on 0.18 μm process technology (1.6 and 1.8 GHz)
- Pentium(r) 4 Processor built on 0.18 μm process technology "Willamette" (1.9 and 2.0 GHz)
- Xeon (2.0 GHz)
- Introduced September 25, 2001
- Pentium® 4 (2 GHz, 2.20 GHz)
- Pentium® 4 (2.4 GHz)
- Introduced April 2, 2002
- Itanium (733 MHz and 800 MHz)
- Itanium 2 (900 MHz and 1 GHz)
- Pentium 4 Processor built on 0.13 μm process technology "Northwood A"(1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6 GHz)
- 400 MHz system bus.
- Pentium 4 Processor built on 0.13 μm process technology "Northwood B" (2.26, 2.4, 2.53, 2.66, 2.8, 3.06 GHz)
- 533 MHz system bus. (3.06 includes Intel's hyper threading technology).
- Mobile Intel Pentium 4 - M Processor build on 0.13 μm process technology; Heart of the Intel mobile "Centrino" system; "Banias" (1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.2 GHz)
- 400 MHz system bus.
- Pentium 4 Processor built on 0.13 μm process technology "Northwood C" (2.4, 2.6, 2.8, 3.0, 3.2 GHz)
- 800MHz system bus (all versions include Hyper Threading)
- 6500 to 10000 MIPS
- Pentium 4E Processor built on 0.09 μm process technology "Prescott" (2.8, 3.0, 3.2, 3.4) 1MB L2 cache
- 533/800MHz system bus (all versions include Hyper Threading except 2.8 (533))
- Designed specifically for advanced gaming
- 7500 to 11000 MIPS
- Intel Pentium 4 Extreme Edition (EE)
- same as Pentium 4 Processor
- 2MB L3 Cache
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Last updated: 10-24-2004 05:10:45